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| Semiconductor April 1999 CT T ODU MEN E PR PLACE -7747 T 2 OLE RE 0-44 OBS ENDED 1-80 .com MM ications arris l ECO h NO R ntral App entapp@ c Ce : Call or email IH6201 Dual CMOS Driver/Voltage Translator Features * Driven Direct from TTL or CMOS Logic * Translates Logic Levels Up to 30V Levels * Switches 20VACPP Signals When Used in Conjunction with the IH401A Varafet (As An Analog Gate) * tON 300ns & tOFF 200ns for 30V Level Shifts * Quiescent Supply Current 100A for Any State (DC) * Provides Both Normal & Inverted Outputs Description The IH6201 is a CMOS, Monolithic, Dual Voltage Translator; it takes low level TTL or CMOS logic signals and converts them to higher levels (i.e. to 15V swings). This translator is typically used in making solid state switches, or analog gates. When used in conjunction with the IH401A Varafets, the combination makes a complete solid state switch capable of switching signals up to 22VP-P and up to 20MHz in frequency. This switch is a "break-before-make" type (i.e. tOFF time < tON time). The combination has typical tOFF 80ns and typical tON 200ns for signals up to 20VP-P in amplitude. A TTL "1" input strobe will force the driver output up to V+ level; the output will be driven down to the V- level. When the TTL input goes to "0", the output goes to V- and goes to V+; thus and are 180o out of phase with each other. These complementary outputs can be used to create a wide variety of functions such as SPDT and DPDT switches, etc.; alternatively the complementary outputs can be used to drive N and P channel MOSFETs, to make a complete CMOS analog gate. The driver typically uses +5V and 15V power supplies, however a wide range of V+ and V- is also possible. It is necessary that V+ > 5V for the driver to work properly, however. Part Number Information PART NUMBER IH6201CJE IH6201MJE IH6201CPE TEMP. RANGE (oC) 0 to 70 -55 to 125 0 to 70 PACKAGE 16 Ld CerDIP 16 Ld CerDIP 16 Ld PDIP Pinout IH6201 (OUTLINE DWGS, JE, PE) TOP VIEW 1 1 NC 2 NC 3 1 4 2 5 NC 6 NC 7 2 8 16 NC 15 TTL INPUT 1 14 V13 GND 12 +5V 11 V+ 10 TTL INPUT 2 9 NC Functional Diagram CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright (c) Harris Corporation 1998 File Number 3136.2 4-1 IH6201 Absolute Maximum Ratings Supply Voltage (V+ to V-) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V+ to VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35V 35V 35V 40V Thermal Information Storage Temperature Range . . . . . . . . . . . . . . . . . . .-65oC to 150oC Lead Temperature (Soldering, 10s). . . . . . . . . . . . . . . . . . . . . 300oC Operating Conditions Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Electrical Specifications V+ = +15V, V- = -15V, VL = +5V IH6201CJE, CPE IH6201MJE -55oC 25oC 28 2.4 125oC UNITS VP-P VDC VDC A ns PARAMETER or Driver Output Swing VIN Strobe Level ("1") for Proper Translation VIN Strobe Level ("0") for Proper Translation IIN Input Strobe Current Draw (for 0V - 5V Range) tON Time tOFF Time I+ (V+) Power Supply Quiescent Current I- (V-) Power Supply Quiescent Current IL (VL) Power Supply Quiescent Current TEST CONDITIONS VIN = 0V + 3V, Figure 3B 0 oC 3.0 25oC 28 3.0 70oC 3.0 14V, -14V -14V, 14V VIN = 0V or +5V VIN = 0V CL = 30pF Switching Turn-on Time, Figure 3B VIN = 0V CL = 30pF Switching Turn-off Time, Figure 3B VIN = 0V or +5V VIN = 0V or +5V VIN = 0V or +5V 0.4 1 - 0.4 1 500 0.4 1 - 0.8 1 500 - 10 10 - - - 500 - - 500 - ns A A A 100 100 100 100 100 100 100 100 100 100 100 100 100 100 100 100 100 100 4-2 IH6201 Schematic Diagram FIGURE 1. SCHEMATIC DIAGRAM (ONE CHANNEL) Applications Input Drive Capability The strobe input lines are designed to be driven from TTL logic levels; this means 0.8V to 2.4V levels max. and min. respectively. For those users who require 0.8V to 2.0V operation, a pull-up resistor is recommended from the TTL output to +5V line. This resister is not critical and can be in the 1k to 10k range. When using 4000 series CMOS logic, the input strobe is connected direct to the 4000 series gate output and no pull up resistors, or any other interface is necessary. When the input strobe voltage level goes below GND (i.e. to -15V) the circuit is unaffected as long as V+ to VIN does not exceed absolute maximum rating. Output Drive Capability The translator output is designed to drive the IH401A Varafets; these are N-channel JFETS with built-in driver diodes. Driver diodes are necessary to isolate the signal source from the driver/translator output; this prevents a forward bias condition between the signal input and the +VCC supply. The IH6201 will drive any JFET provided some sort of isolation is added. You will notice in Figure 2 that a "referral" resistor has been added from 2N4391 gate to its source. This resistor is needed to compensate for the inadequate charge area curve for isolation diode i.e. if C vs. V plot for diode 2 [C vs. V plot FIGURE 2. for output JFET] switch won't function; then adding this resistor overcomes this condition. The "referral" resistor is normally in the 100k to 1M range and is not tool critical. Making a Complete Solid State Switch that Can Handle 20VP-P Signals The limitation on signal handling capability comes from the output gating device. When a JFET is used, the pinch-off of the JFET acting with the V- supply does the limiting. In fact max. signal handling capability = 2 (VP + (V-)) VP-P where VP = pinch-off voltage of JFET chosen. i.e. VP = 7V, V- = -15V: max. signal handling = 2(7V + (-15V)) VP-P = 2 (7V - 15) VP-P = 2(-8VP-P) = 16VP-P . Obviously to get 20VP-P , VP 5V with V- = -15V. Another simple way to get 20VP-P with VP = 7V, is to increase V- to -17V. In fact using V+ = +12V or +15V and setting V- = -18V allows one to switch 20VP-P with the IH401A. The advantage of using the VP = 7V pinch-off (along with unsymmetrical supplies), over the VP = 5V pinch-off (and 4-3 IH6201 15V supplies), is that you will have a much lower RDS(ON) for the VP = 7 JFET (i.e. for the 2N4391). rDS(ON) 22, VP = 7V RDS(ON) 35 VP = 5V The IH6201 is a dual translator, each containing 4 CMOS FET pairs. The schematic of one-half of an IH6201, driving one-quarter of an IH401A, is shown in Figure 3A. FIGURE 3B. NOTE: Each translator output has a and output, is just the inverse of . FIGURE 3A. A very useful feature of this system is that one-half of an IH6201 and one-half of an IH401A can combine to make a SPDT switch, or an IH6201 plus an IH401A can make a dual SPDT analog switch (See Figure 6). Switches FIGURE 4. DUAL SPST ANALOG SWITCH FIGURE 5. DPDT ANALOG SWITCH FIGURE 6. DUAL SPDT FIGURE 7. DUAL DPST 4-4 |
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